1ch 200mA CMOS LDO 레귤레이터 - BU15SD2MG-M

BUxxSD2-M 시리즈는 범용 패키지 SSOP5 (2.9mm×2.8mm×1.25mm)를 채용한 200mA 출력의 고성능 FULL CMOS 레귤레이터입니다. 회로전류 33μA의 저소비전류이며, 노이즈 특성 및 부하 응답 특성이 우수하여 카 스테레오, 카 네비게이션 등 다양한 어플리케이션에 적합합니다.

포장 수량
최소 포장 단위
포장 사양
BU15SD2MG-MTR 공급중 SSOP5 3000 3000 Taping Yes
사양 :
Grade Automotive
Breakdown Voltage(Max.)[V] 6.5
ch 1
Vin(Min.)[V] 1.7
Vin(Max.)[V] 6.0
Vout (Typ.) [V] 1.5
Vout Precision ±2.0%
Iout(Max.)[A] 0.2
Circuit Current[mA] 0.033
Output Short Current[mA] 100
Shutdown Function Yes
Thermal Shut-down Yes
Over Current Protection Yes
Over Voltage Protection No
Discharge Function No
Soft Start No
I/O Voltage Difference (Typ.)[V] 0.18(Io=0.1A)
Ripple Rejection [dB] 68.0
Input Capacitor[µF] 0.47
Output Capacitor[µF] 0.47
Operating Temperature (Min.)[°C] -40
Operating Temperature (Max.)[°C] 105
특징 :
  • ・ High-accuracy output voltage of ±2.0% (In all recommended condition)
    ・ High ripple rejection: 68 dB (Typ., 1 kHz,)
    ・ Compatible with small ceramic capacitor (Cin=Cout=0.47 μF)
    ・ Low current consumption: 33 μA
    ・ ON/OFF control of output voltage
    ・ With built-in over current protection circuit and thermal shutdown circuit
    ・ Package SSOP5 is similar to SOT23-5(JEDEC)
어플리케이션 :
관련 상품
관련 신제품 / 갱신 제품파워 매니지먼트
형명 제품 이름 패키지 Datasheet 유통 재고
BU28SD2MG-M 1ch 200mA CMOS LDO 레귤레이터 SSOP5   구입
BU30SD2MG-M 1ch 200mA CMOS LDO 레귤레이터 SSOP5   구입
BU33SD2MG-M 1ch 200mA CMOS LDO 레귤레이터 SSOP5   구입
BU12SD2MG-M 1ch 200mA CMOS LDO 레귤레이터 SSOP5   구입
BU18SD2MG-M 1ch 200mA CMOS LDO 레귤레이터 SSOP5   구입
BU25SD2MG-M 1ch 200mA CMOS LDO 레귤레이터 SSOP5   구입
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기술 정보
Table of resistance for output voltage setting on linear regulator Ics

This application notes provide tables for each series so that it is easy to set the resistance value for the output voltage setting from various internal reference voltages VREF.

Thermal Resistance

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BDxxSD2, BDxxSD5, BDxxTD3 Series PCB Layout

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Basics of Linear Regulators

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Simple Test Method for Estimating the Stability of Linear Regulators

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Thermal Calculation for Linear Regulator

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BAxxCC0 Series Circuit Using a Ceramic Output Capacitor

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Measurement Method for Phase Margin with Frequency Response Analyzer (FRA)

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Connecting LDOs in Parallel

Provides some hints on how to connect LDOs in parallel.